Samsung Achieves Early Lead With First 3nm GAA Chip Production

Samsung Foundry has entered full-scale manufacturing of its first-generation 3nm process, marking an early advantage over competitor TSMC, whose comparable 3nm production will not begin until later this year. The company recently held a ceremony in South Korea to mark delivery of the first batch of chips built using its Multi-Bridge-Channel FET (MBCFET) design.

These initial 3nm chips have already been shipped to a Chinese firm specializing in cryptocurrency mining, where they will be deployed for Bitcoin mining operations. Dr. Siyoung Choi, President of Samsung Foundry, reports that the new mining chips consume 23 to 45 percent less power than previous generation chips built on older process nodes.

Samsung's 3nm architecture relies on Gate-All-Around (GAA) technology implemented through MBCFET transistors, moving beyond the limits of the earlier FinFET design. This approach delivers both higher performance and significantly improved power efficiency. The company introduces its first nanosheet transistor application with these chips, targeting high-performance, low-power computing tasks, while planning future expansions into mobile processor designs.

Compared with Samsung's established 5nm process, the new 3nm node achieves up to 45 percent lower power consumption, a 23 percent performance gain, and a 16 percent reduction in chip area. Samsung also previewed roadmap targets for its second-generation 3nm chips, projected to deliver up to 50 percent lower power use, 30 percent faster performance, and 35 percent smaller area. According to the company's technology roadmap, mass production of the next-generation 3nm chips is scheduled for 2023, with the more advanced 2nm process expected to enter volume production by the end of 2025.